A FinFET (=Fin Field Effect Transistor) may provide a proper drive current and may avoid so-called short-channel-effects that limit the performance of a FET.
U.S. Pat. No. 6,413,802 discloses a FinFET device fabricated using conventional planar MOSFET technology. The device is fabricated in a silicon layer overlying an insulating layer (for instance, SIMOX) with the device extending from the insulating layer as a fin. Double gates are provided over the sides of the channel to provide enhanced drive current and effectively suppress short channel effects. A plurality of channels can be provided between a source and a drain for increased current capacity. Two transistors can be stacked in a fin to provide a CMOS transistor pair having a shared gate.
Bhuwelka, K. N. et al. 2005, “Scaling the Vertical Tunnel FET With Tunnel Bandgap Modulation and Gate Workfunction Engineering”, IEEE Transactions on Electron Devices, Vol. 52, No. 5, pp. 909 to 917 discloses a vertical field effect transistor (FET) comprising a gated p-i-n diode showing gate-controlled band-to-band tunneling for a heavily doped source to an intrinsic channel.
Such conventional systems may lack suitability for high-scale integration with a simultaneous proper performance.